Biography
Zihao Pu is a PhD student in the Department of Engineering, King’s College London. Zihao's research focuses on processing-in-memory (PIM) and data-centric computing architectures, aiming to accelerate large-scale computation through hardware–software co-design.
Before joining King’s, Zihao earned a joint Master of Science in Integrated Circuit Design with Distinction from Nanyang Technological University and the Technical University of Munich, and a Bachelor of Applied Science in Electrical Engineering with Distinction from the University of British Columbia.
He has gained research and industry experience at AMD, where he developed FPGA-based SmartNIC architectures for distributed machine learning, and at A*STAR’s Institute of Microelectronics, where he designed cryogenic CMOS circuits for quantum computing applications. His earlier work at UBC’s Molecular Mechatronics Lab explored capacitive sensing and resulted in a publication at IEEE SENSORS 2023.Zihao’s current interests include reconfigurable computing, compute-in-memory systems, and hardware acceleration for AI workloads.
Research Interests
Zihao’s research explores processing-in-memory (PIM) architectures as a means to overcome the memory bottleneck in large-scale AI workloads. His work focuses on the co-design of hardware and software systems that bring computation closer to data, improving efficiency and scalability for large language models (LLMs) and other data-intensive applications. By combining architectural innovation with practical implementation on FPGA and ASIC platforms, Zihao aims to enable next-generation computing systems that deliver higher performance and energy efficiency for modern AI infrastructure.
- Process-in-Memory (PIM) Architectures
- Hardware-software co-design
- Large Language Model (LLM) Acceleration
Thesis Title
Processing-in-Memory Architectures for Data-Centric Computing: Hardware–Software Co-Design for Scalable AI Acceleration (Provisional)
Supervisor Team
First Supervisor: Dr Haiyu Mao
Second Supervisor: Professor Bipin Rajendran
Publications
J. Gao et al., "Smart Insole: Stand-Alone Soft 3-Axis Force Sensing Array in a Shoe," 2023 IEEE SENSORS, Vienna, Austria, 2023, pp. 1-4, doi: 10.1109/SENSORS56945.2023.10324863.
Blog
Zihao’s Blog